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Trusted Semiconductor Solutions' Structured ASIC Solutions

Our customers have indicated that there is a need for a cost-effective, fast time to market alternative to conventional digital ASIC’s. The non-recurring cost for foundry masks has reached a point in the military marketplace where it exceeds the recurring manufacturing revenue due to the low production volumes.Our objective is to provide a series of alternatives to enable the lowest cost of ownership for implementing a digital ASIC.

Cost-Effectiveness Approaches

  • Development of a Structure ASIC using ViASIC technology
    • Current design engagements with IBM 90nm version of the technology
    • This technology can be implemented with between one and four layers
    • In development of a 90nm SOI version of this technology for Space Applications
  • Use of Multi-Project Production runs
    • Our company executes customer specific designs
    • These designs generally do not take the entire mask reticle area
    • We attempt to coordinate other customers to utilize these production runs
  • Implementing a pre-placed design resource array
    • This is effectively a gate array using modern technology and design IP blocks
    • Allows a prepositioning of resources on a mask set with only the need to modify the metal and via layers to route the design
  • Shared design physical design kits, libraries, and tools
    • This enables a more efficient use of these expensive state of the art resources
    • We enable customers to connect to our tools to oversee the technical progress on our ASIC programs
Copyright Trusted Semiconductor Solutions, Inc. 2006-2009